Our Projects
FARA RISC-V Microcontroller: High-Performance Embedded Processing Solution
The FARA RISC-V Microcontroller is a cutting-edge, power-efficient embedded solution engineered to deliver exceptional computational performance and versatility across industrial, consumer, and IoT applications. Built on a 350MHz RISC-V core with an optimized pipeline architecture, FARA strikes an ideal balance between high-speed processing and energy efficiency, enabling seamless integration into real-time systems and general-purpose embedded designs.
FARA combines low-cost scalability with industrial-grade durability, serving as a standalone controller or a flexible component in complex systems. Designed for developers and engineers, it bridges the gap between advanced computational needs and cost-effective deployment, making it a future-proof choice for next-generation embedded innovations. Here are some key features of FARA:
Advanced Processing Power: Leveraging a robust 350MHz RISC-V core, FARA ensures reliable performance for demanding tasks such as real-time control, signal processing, and complex algorithm execution.
Zephyr OS Compatibility: Pre-integrated support for the modular, real-time Zephyr OS provides a scalable software environment tailored for embedded systems, accelerating development cycles.
Comprehensive Debugging Tools: A fully GDB-compatible debugging framework streamlines testing, optimization, and troubleshooting, empowering developers with industry-standard tools.
Rich Peripheral Integration: Equipped with SPI, I2C, ADC, PWM, RTC, Timer, and DMA interfaces, FARA offers unparalleled adaptability for sensor integration, motor control, communication protocols, and low-latency data handling.
Ideal for diverse sectors, FARA excels in motor control systems, home and industrial automation, smart appliances, battery-operated devices, and environmental monitoring solutions. Its robust architecture ensures reliable operation in both resource-constrained and high-performance environments.
ARM-based Low-Power IoT Chip: Efficient Connectivity and Tracking Solution
The Low-Power IoT Chip is a purpose-built, energy-efficient solution designed to enable reliable connectivity and precise tracking for battery-operated IoT devices. Built around an ARM Cortex-M0 core, it combines low-power operation with integrated mixed-signal capabilities, ensuring seamless performance in applications requiring extended battery life and multi-mode functionality.
Balancing cost-effectiveness with scalable performance, this chip simplifies the development of compact, energy-conscious IoT devices. Its blend of Cortex-M0 efficiency, mixed-signal flexibility, and robust tracking features makes it a pragmatic choice for developers targeting wearable tech, industrial IoT, or consumer-grade smart solutions. Here are some key features of the chip:
- Optimized Power Efficiency: Engineered for minimal energy consumption, the chip supports long-lasting operation in battery-powered systems, ideal for remote or always-on deployments.
- Integrated Mixed-Mode Design: Combines RF, analog, and digital processing in a single chipset, simplifying design complexity while enabling robust communication and signal handling.
- Multi-Mode Tracking: Advanced tracking capabilities support diverse use cases, from location-based services to asset monitoring, with adaptable precision.
- On-Chip Memory Resources: Features 4Mbit internal SRAM and 2Mbit ROM, providing ample storage for firmware, data logging, and real-time processing tasks.
- Versatile Connectivity: Equipped with SPI, UART, Timers, and Watchdog interfaces, ensuring compatibility with sensors, peripherals, and communication modules.
- Fully Digital Baseband: Enhances signal integrity and reduces external component dependency for streamlined system integration.
Designed for versatility, this chip excels in smartwatches, healthcare monitoring devices, personal navigation systems, asset tracking solutions, and IoT platforms requiring reliable, low-power connectivity.
Digital Signature Chip: Secure Authentication and Cryptographic Solution
The Digital Signature Chip is a dedicated 32-bit secure microcontroller designed to deliver robust cryptographic performance and hardware-accelerated security for connected devices. Built with an integrated RSA-2048 accelerator and USB connectivity, DSC ensures efficient execution of encryption, authentication, and digital signature tasks while minimizing software overhead. Its architecture combines high-speed memory resources with advanced security features, making it ideal for systems demanding tamper-resistant operations and seamless integration.
DSC merges cost-effective security with hardware-driven efficiency, reducing development complexity and accelerating time-to-market for secure devices. By offloading cryptographic tasks to dedicated hardware, it minimizes latency, enhances system reliability, and safeguards sensitive data—ideal for developers prioritizing both performance and compliance in finance, IoT, and enterprise applications. Here are some key features of the chip:
Hardware-Accelerated Security: Dedicated engines for RSA (512/1024/2048-bit), AES-256, and hash functions (HMAC, SHA1/2, MD5) enable fast cryptographic operations without relying on software, preserving Flash memory for application code.
Optimized Memory Configuration: Includes 128KB internal Flash, 16KB ITCM, and 16KB DTCM for high-speed data access and secure firmware storage.
USB Connectivity: Direct interface support for PCs and cellular devices simplifies deployment in USB tokens, OTP generators, and smart card readers.
Comprehensive Cryptographic Suite: Full hardware-based implementation of asymmetric/symmetric encryption and hashing ensures reliable protection against vulnerabilities.
Rich Peripheral Support: Flexible I/O and system integration capabilities cater to diverse security-focused designs.
DSC is engineered for secure authentication in USB tokens, digital signatures, one-time password (OTP) systems, POS terminals, IoT security modules, smart cards, and general-purpose embedded systems requiring hardware-backed encryption.
On-Screen Display Co-Processor: Real-Time Video Overlay Solution
The OSD Co-Processor is a specialized hardware solution designed to integrate customizable secondary visuals into live video streams, enabling dynamic image processing for enhanced user interfaces. Supporting resolutions up to 1920x1080p@30 with bilinear scaling and blending, it ensures crisp, real-time overlays for applications requiring visual data integration without interrupting primary video workflows.
The OSD Co-Processor simplifies the integration of dynamic visual data into video streams, reducing development time for systems requiring reliable, real-time overlays. Its balance of high-resolution performance and adaptable processing makes it a practical choice for industries prioritizing clear, responsive user interfaces—from manufacturing to automotive tech. Here are some key features of the chip:
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Real-Time Image Merging: Seamlessly combines secondary graphics or data into video streams, ideal for overlays such as status alerts, sensor readings, or navigation cues.
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Customizable Processing: Supports color space conversion, cropping, resizing, and zooming, allowing tailored visual outputs to match specific system requirements.
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High-Resolution Support: Delivers Full HD (1080p) processing at 30 frames per second, maintaining clarity for critical monitoring and display applications.
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Bilinear Scaling and Blending: Ensures smooth transitions and sharp overlays, minimizing artifacts during image adjustment or layer integration.
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Smart Factory & IoT: Enhances HMI panels with real-time operational data, alerts, and diagnostics for industrial automation.
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Surveillance Systems: Optimizes CCTV and security feeds with resizable overlays for situational awareness in monitoring environments.
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Robotics & Autonomous Systems: Supports real-time image adjustments for navigation, object detection, and gesture recognition in robotics.
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Automotive HUDs: Displays critical driver information (speed, navigation) on windshields or infotainment systems with minimal latency.
Internet Broadband Gateway: Scalable Connectivity and Processing Solution
The Internet Broadband Gateway (IBG) is a flexible, dual-chip ARM-based system designed to serve as a high-performance gateway for diverse network and embedded applications. Combining two 32-bit ARM946 processors with a multi-layer AHB interconnect architecture, IBG balances efficient data handling and system configurability, making it adaptable for both enterprise and industrial environments. Its distributed design supports dynamic resource allocation, enabling tailored solutions for varying performance and functional requirements.
IBG offers scalable performance and configurable hardware resources, empowering OEMs to develop cost-effective solutions with varying complexity. By supporting eight parallel hardware threads and dynamic partitioning, it caters to both entry-level and high-end device requirements, reducing time-to-market for customized network products. Here are some key features of the chip:
- Dual ARM946 Processors: Dual 32-bit cores with ARM interconnect matrix ensure parallel processing for demanding network tasks and system management.
- Reconfigurable Architecture: Runtime-adjustable interconnects allow partitioning into isolated blocks or unified resource-sharing configurations, enhancing design flexibility.
- Advanced Data Transfer: Dual Master DMA controllers streamline data movement between system components, reducing latency and improving throughput.
- Broad Interface Support: Integrates Fast Ethernet, ADSL, USB, E1, PCMCIA, UART, and DSP connectivity for seamless integration with network and peripheral devices.
- Layer-2/3 Switching: Embedded hardware-accelerated switching and security mechanisms enable robust traffic management and data protection.
- Expandable DSP Integration: External DSP interface adds voice processing and signal-handling capabilities for specialized applications.
- Linux OS Compatibility: Pre-optimized Linux support simplifies software development and enables web-based system management.
Ideal for enterprise gateways, telecom infrastructure, industrial IoT hubs, and managed network switches. Its versatility extends to applications requiring secure, high-bandwidth connectivity, such as multi-service routers, VoIP systems, and smart grid communications.
FPGA Crypto Miner: Efficient and Versatile Blockchain Mining Solution
Implementing blockchain-based hash algorithms on FPGA offers a compelling alternative to conventional CPU, GPU, or ASIC mining platforms by significantly reducing power consumption. A single FPGA board consumes less than 100W—small enough to be powered by solar cells—yet it delivers performance comparable to that of a GPU. This superior power efficiency also minimizes cooling requirements compared to the noisier ASIC miners. Additionally, the current trend toward high-level synthesis of C-implemented hash algorithms accelerates development, while leaving room for custom RTL implementations that achieve superior performance.
Performance Efficiency:
- FPGA platforms offer considerable power advantages over CPU and GPU mining, while delivering competitive ROI and maximum profit compared to ASIC miners.
Cost-Effective and Versatile:
- Lower power consumption leads to reduced cooling and operational costs.
- Suitable for ASIC-resistant coins and can effectively withstand hard forks.
- Extended lifecycle and the flexibility to be repurposed for applications in artificial intelligence and data centers.
Market Position:
- CPU performance is no longer sufficient for modern mining demands.
- GPUs are becoming less profitable due to market saturation.
- ASIC miners, though powerful, incur high costs and consume significant power.
The mining platform is composed of two main components:
Host Board:
- Manages pool communication and can be built on any low-cost platform such as Raspberry Pi, Arduino, or Xilinx Zynq equipped with Linux OS.
FPGA Board:
- Implements hash functions using configurable hardware.
- Requires extensive LUT resources, with minimal peripheral needs, exemplified by the Xilinx Kintex FPGA series.
A low bit-rate serial link connects these boards, enabling efficient data exchange and coordinated operation.
This structured solution combines cutting-edge FPGA technology with smart system design to deliver a robust, efficient, and versatile crypto mining platform.
(Denarious is based on Tribus)
| Price/Power/Performance Analysis for FPGA (Kintex 325t) | ||
| FPGA/Intel Core i7 | FPGA/Nvidia 1080Ti | |
|---|---|---|
| Performance (hash/sec) | 1000x | 3x |
| Power | 50% | 25% |
| Price | 20% | 50% |